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amd_asic_type.h
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ati_pcigart.h
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drmP.h
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drm_agpsupport.h
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drm_atomic.h
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drm_atomic_helper.h
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drm_atomic_state_helper.h
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drm_atomic_uapi.h
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drm_audio_component.h
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drm_auth.h
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drm_blend.h
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drm_bridge.h
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drm_cache.h
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drm_client.h
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drm_color_mgmt.h
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drm_connector.h
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drm_crtc.h
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drm_crtc_helper.h
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drm_damage_helper.h
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drm_debugfs.h
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drm_debugfs_crc.h
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drm_device.h
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drm_displayid.h
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drm_dp_dual_mode_helper.h
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drm_dp_helper.h
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drm_dp_mst_helper.h
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drm_drv.h
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drm_dsc.h
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drm_edid.h
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drm_encoder.h
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drm_encoder_slave.h
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drm_fb_cma_helper.h
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drm_fb_helper.h
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drm_file.h
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drm_fixed.h
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drm_flip_work.h
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drm_format_helper.h
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drm_fourcc.h
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drm_framebuffer.h
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drm_gem.h
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drm_gem_cma_helper.h
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drm_gem_framebuffer_helper.h
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drm_gem_shmem_helper.h
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drm_gem_vram_helper.h
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drm_hashtab.h
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drm_hdcp.h
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drm_ioctl.h
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drm_irq.h
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drm_lease.h
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drm_legacy.h
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drm_mipi_dbi.h
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drm_mipi_dsi.h
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drm_mm.h
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drm_mode_config.h
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drm_mode_object.h
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drm_modes.h
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drm_modeset_helper.h
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drm_modeset_helper_vtables.h
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drm_modeset_lock.h
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drm_of.h
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drm_os_linux.h
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drm_panel.h
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drm_pci.h
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drm_pciids.h
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drm_plane.h
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drm_plane_helper.h
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drm_prime.h
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drm_print.h
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drm_probe_helper.h
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drm_property.h
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drm_rect.h
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drm_scdc_helper.h
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drm_self_refresh_helper.h
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drm_simple_kms_helper.h
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drm_syncobj.h
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drm_sysfs.h
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drm_util.h
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drm_utils.h
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drm_vblank.h
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drm_vma_manager.h
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drm_vram_mm_helper.h
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drm_writeback.h
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gma_drm.h
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gpu_scheduler.h
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i915_component.h
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i915_drm.h
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i915_mei_hdcp_interface.h
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i915_pciids.h
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intel-gtt.h
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intel_lpe_audio.h
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spsc_queue.h
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Code Editor : spsc_queue.h
/* * Copyright 2017 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef DRM_SCHEDULER_SPSC_QUEUE_H_ #define DRM_SCHEDULER_SPSC_QUEUE_H_ #include <linux/atomic.h> #include <linux/preempt.h> /** SPSC lockless queue */ struct spsc_node { /* Stores spsc_node* */ struct spsc_node *next; }; struct spsc_queue { struct spsc_node *head; /* atomic pointer to struct spsc_node* */ atomic_long_t tail; atomic_t job_count; }; static inline void spsc_queue_init(struct spsc_queue *queue) { queue->head = NULL; atomic_long_set(&queue->tail, (long)&queue->head); atomic_set(&queue->job_count, 0); } static inline struct spsc_node *spsc_queue_peek(struct spsc_queue *queue) { return queue->head; } static inline int spsc_queue_count(struct spsc_queue *queue) { return atomic_read(&queue->job_count); } static inline bool spsc_queue_push(struct spsc_queue *queue, struct spsc_node *node) { struct spsc_node **tail; node->next = NULL; preempt_disable(); tail = (struct spsc_node **)atomic_long_xchg(&queue->tail, (long)&node->next); WRITE_ONCE(*tail, node); atomic_inc(&queue->job_count); /* * In case of first element verify new node will be visible to the consumer * thread when we ping the kernel thread that there is new work to do. */ smp_wmb(); preempt_enable(); return tail == &queue->head; } static inline struct spsc_node *spsc_queue_pop(struct spsc_queue *queue) { struct spsc_node *next, *node; /* Verify reading from memory and not the cache */ smp_rmb(); node = READ_ONCE(queue->head); if (!node) return NULL; next = READ_ONCE(node->next); WRITE_ONCE(queue->head, next); if (unlikely(!next)) { /* slowpath for the last element in the queue */ if (atomic_long_cmpxchg(&queue->tail, (long)&node->next, (long) &queue->head) != (long)&node->next) { /* Updating tail failed wait for new next to appear */ do { smp_rmb(); } while (unlikely(!(queue->head = READ_ONCE(node->next)))); } } atomic_dec(&queue->job_count); return node; } #endif /* DRM_SCHEDULER_SPSC_QUEUE_H_ */
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